❞ مذكّرة 09 – Asynchronous Sequential Logic :M. Morris Mano ❝ ⏤ إم موريس مانو

09 – Asynchronous Sequential Logic

BY :M. Morris Mano

Chapter 9
Asynchronous Sequential Logic
9.1 INTRODUCTION
A sequential circuit is specified by a time sequence of inputs, outputs, and internal states, In
synchronous sequential circuits, the change of internal state occurs in response to the synchronized
clock puIses, Asynchronous sequential circuits do not use clock pulses. The change
of internal state occurs when them is a change in the input variables. The memory elements in
synchronous sequential circuits are clocked flip-flops, The memory elements in asynchronous
sequential circuits are either unclocked flip-flops or time-delay elements. The memory capability
of a time-delay device hpends on the finite amount of time it takes for the signal to
propagate through digital gates. An asynchronous sequential circuit quite often resembles a
combinational circuit with feedback.
The design of asynchronous sequential circuits is more difficult than that of synchronous circuits
because of the timing problems involved in the feedback path. In a properly designed
synchronous system, timing problems are eliminated by triggering all flip-flops with the pulse
edge. The change from one state to the next occurs during the short lime of the pulse transition.
Since the asynchronous circuit does not use a clock, the state of the system is allowed to
change immediately after the input changes. Care must be taken to ensure that each new state
keeps the circuit in a stable condition even though a feedback palh exists.
Asynchronous sequentid circuits are useful in a variety of applications. They are used when
speed of operation is important, especially in those cases where he digital system must respond
quickly without having to wait for a clock pulse. They are more economical to use in
small independent systems that require only a few components, as it may not be practical to
go to the expense of providing a circuit for generating clock pulses. Asynchronous circuits are
useful in applications where the input signals to the system may change at any time, independently
of an internal dock. The communication between two units, each having its own

An asynchronous circuit, or self-timed circuit, is a sequential digital logic circuit which is not governed by a clock circuit or global clock signal. Instead it often uses signals that indicate completion of instructions and operations, specified by simple data transfer protocols. This type of circuit is contrasted with synchronous circuits, in which changes to the signal values in the circuit are triggered by repetitive pulses called a clock signal. Most digital devices today use synchronous circuits. However asynchronous circuits have the potential to be faster, and may also have advantages in lower power consumption, lower electromagnetic interference, and better modularity in large systems. Asynchronous circuits are an active area of research in digital logic design.

Synchronous vs asynchronous logic
Digital logic circuits can be divided into combinational logic, in which the output signals depend only on the current input signals, and sequential logic, in which the output depends both on current input and on past inputs. In other words, sequential logic is combinational logic with memory. Virtually all practical digital devices require sequential logic. Sequential logic can be divided into two types, synchronous logic and asynchronous logic.

In synchronous logic circuits, an electronic oscillator generates a repetitive series of equally spaced pulses called the clock signal. The clock signal is applied to all the memory elements in the circuit, called flip-flops. The output of the flip-flops only changes when triggered by the edge of the clock pulse, so changes to the logic signals throughout the circuit all begin at the same time, at regular intervals synchronized by the clock. The output of all memory elements in a circuit is called the state of the circuit. The state of a synchronous circuit changes only on the clock pulse. The changes in signal require a certain amount of time to propagate through the combinational logic gates of the circuit. This is called propagation delay. The period of the clock signal is made long enough so the output of all the logic gates have time to settle to stable values before the next clock pulse. As long as this condition is met, synchronous circuits will operate stably, so they are easy to design.
However a disadvantage of synchronous circuits is that they can be slow. The maximum possible clock rate is determined by the logic path with the longest propagation delay, called the critical path. So logic paths that complete their operations quickly are idle most of the time. Another problem is that the widely distributed clock signal takes a lot of power, and must run whether the circuit is receiving inputs or not.
In asynchronous circuits, there is no clock signal, and the state of the circuit changes as soon as the inputs change. Since asynchronous circuits don't have to wait for a clock pulse to begin processing inputs, they can be faster than synchronous circuits, and their speed is theoretically limited only by the propagation delays of the logic gates. However, asynchronous circuits are more difficult to design and subject to problems not found in synchronous circuits. This is because the resulting state of an asynchronous circuit can be sensitive to the relative arrival times of inputs at gates. If transitions on two inputs arrive at almost the same time, the circuit can go into the wrong state depending on slight differences in the propagation delays of the gates. This is called a race condition. In synchronous circuits this problem is less severe because race conditions can only occur due to inputs from outside the synchronous system, called asynchronous inputs. Although some fully asynchronous digital systems have been built (see below), today asynchronous circuits are typically used in a few critical parts of otherwise synchronous systems where speed is at a premium, such as signal processing circuits.
 

08 – Design at the Register Transfer Level :M. Morris Mano
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